Apple's A20 Pro Leak: They Finally Ditched the Memory Sandwich!

Leaked schematics for the A20 Pro reveal that Apple is officially moving to a WMCM (Wafer-level Multi-Chip Module) architecture. Because the old 3D packaging couldn't handle the data traffic for Apple Intelligence, engineers had to ditch the memory-on-processor stacking method. Instead of stacking DRAM vertically, they are moving it to the side to make room for a massive 96-bit memory bus.

By spreading things out horizontally, Apple avoids the heat and density bottlenecks that plagued their previous designs. This change is all about feeding the hunger of the new Neural Engine and graphic cores. The GPU is getting a significant boost, featuring seven distinct GPU cores, which is a record-breaker for their mobile silicon lineup.

To support the heavy background lifting of modern generative models, the L2 cache for efficiency cores has been bumped to 8MB. While the core count remains familiar, the physical layout of the chip is now optimized to handle high-bandwidth tasks without choking. This isn't just a minor refresh; it's a structural realization that 3D stacking has finally hit its physical limit.

The shift to a wider memory bus confirms that Apple is terrified of their AI features running slowly on-device. By choosing a complex horizontal arrangement over the elegant but restrictive vertical stack, they are admitting that raw physical space is the only way to satisfy the insatiable appetite of local AI models. It’s a fascinating, if messy, confession that the future of mobile silicon is less about sleek, compact beauty and more about bulky, brute-force engineering.

Source: Wccftech