Huawei's New Plan to Beat US Sanctions: Just Build a 3D Apartment for Chips

Huawei is throwing a curveball at the industry by introducing the Tau Scaling Law. Instead of agonizing over the US export ban on advanced EUV lithography machines, the company claims it can achieve the density of a 1.4nm process by simply stacking logic circuits in two layers rather than one. They call this architecture LogicFolding.

By vertically stacking components, Huawei isn't shrinking the physical transistors—which remain stuck at the sizes SMIC can currently manufacture—but it is drastically cutting down the travel distance for electrical signals. Because the signal jumps to the floor below instead of crossing the chip, the propagation delay, or τ (tau), is significantly reduced. Huawei states it has already quietly pushed 381 chip models into production using this principle over the past six years.

The first batch of Kirin smartphone processors featuring LogicFolding is expected to arrive this autumn. Plans are already in motion to scale this to Ascend AI accelerators and massive server clusters by 2030. Despite the optimism, the president of Huawei's semiconductor division, He Tingbo, has admitted that the company still lacks the necessary design tools and, unsurprisingly, hasn't quite figured out how to stop these "apartments" from overheating.

This is a fascinating exercise in "if you can't buy the best tools, just change the game." Whether this is a genuine breakthrough or just a clever way to mask the brutal reality of lagging behind global standards remains the biggest question in tech. If you can't beat the physics of lithography, why not just build a skyscraper on a piece of silicon and hope it doesn't melt?

Source: Huawei